Renesas 740 Family User Manual

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology C

Rev.2.00 Nov 14, 2006 page 2 of 185REJ09B0322-0200CENTRAL PROCESSING UNIT2. CENTRAL PROCESSING UNIT (CPU)Six main registers are built into the CP

Rev.2.00 Nov 14, 2006 page 92 of 185REJ09B0322-0200STXSTXSTORE INDEX REGISTER X IN MEMORY(M) ← (X)This instruction stores the contents of X in M

Rev.2.00 Nov 14, 2006 page 93 of 185REJ09B0322-0200STYSTYSTORE INDEX REGISTER Y IN MEMORY(M) ← (Y)This instruction stores the contents of Y in M.

Rev.2.00 Nov 14, 2006 page 94 of 185REJ09B0322-0200TAXTAXTRANSFER ACCUMULATOR TO INDEX REGISTER X(X) ← (A)This instruction stores the contents

Rev.2.00 Nov 14, 2006 page 95 of 185REJ09B0322-0200TAYTAYTRANSFER ACCUMULATOR TO INDEX REGISTER Y(Y) ← (A)This instruction stores the contents

Rev.2.00 Nov 14, 2006 page 96 of 185REJ09B0322-0200TSTTSTTEST FOR NEGATIVE OR ZERO(M) = 0 ?This instruction tests whether the contents of M are “

Rev.2.00 Nov 14, 2006 page 97 of 185REJ09B0322-0200TSXTSXTRANSFER STACK POINTER TO INDEX REGISTER X(X) ← (S)This instruction transfers the cont

Rev.2.00 Nov 14, 2006 page 98 of 185REJ09B0322-0200TXATXATRANSFER INDEX REGISTER X TO ACCUMULATOR(A) ← (X)This instruction stores the contents o

Rev.2.00 Nov 14, 2006 page 99 of 185REJ09B0322-0200TXSTXSTRANSFER INDEX REGISTER X TO STACK POINTER(S) ← (X)This instruction stores the contents

Rev.2.00 Nov 14, 2006 page 100 of 185REJ09B0322-0200TYATYATRANSFER INDEX REGISTER Y TO ACCUMULATOR(A) ← (Y)This instruction stores the contents

Rev.2.00 Nov 14, 2006 page 101 of 185REJ09B0322-0200WITWITWAITOperation :Function :Status flag :CPU ← Wait stateThe WIT instruction stops the in

Rev.2.00 Nov 14, 2006 page 3 of 185REJ09B0322-02002.3 Stack Pointer (S)The Stack Pointer is an eight-bit register used for generating interrupts

Rev.2.00 Nov 14, 2006 page 102 of 185REJ09B0322-0200INSTRUCTIONS3.4 Instructions Related to Interrupt Handling and Subroutine Processing3.4.1 Ins

Rev.2.00 Nov 14, 2006 page 103 of 185REJ09B0322-0200(4) Interrupt Control within Interrupt RoutinesAfter an interrupt is accepted and execution o

Rev.2.00 Nov 14, 2006 page 104 of 185REJ09B0322-0200Instruction to push onto StackPHAPHPAccumulatorProcessor status registerInstruction to pull f

NOTES ON USERev.2.00 Nov 14, 2006 page 105 of 185REJ09B0322-02004. NOTES ON USEThe information below applies to the entire 740 Family. Please r

NOTES ON USERev.2.00 Nov 14, 2006 page 106 of 185REJ09B0322-02004.2 Termination of unused pinsAt the termination of unused pins, perform wiring

NOTES ON USERev.2.00 Nov 14, 2006 page 107 of 185REJ09B0322-02004.3 Notes on interrupts4.3.1 Setting for interrupt request bit and interrupt en

NOTES ON USERev.2.00 Nov 14, 2006 page 108 of 185REJ09B0322-02004.3.3 Distinction of interrupt request bitWhen executing the BBC or BBS instruc

NOTES ON USERev.2.00 Nov 14, 2006 page 109 of 185REJ09B0322-02004.4 Notes on programming4.4.1 Processor Status Register(1) Initialization of Pr

NOTES ON USERev.2.00 Nov 14, 2006 page 110 of 185REJ09B0322-02004.4.2 BRK instruction(1) Method detecting interrupt sourceIt can be detected th

NOTES ON USERev.2.00 Nov 14, 2006 page 111 of 185REJ09B0322-0200(2) Status flags in decimal modeWhen decimal mode is selected (D = 1), the valu

Rev.2.00 Nov 14, 2006 page 4 of 185REJ09B0322-02002.4 Program Counter (PC)The Program Counter is a sixteen-bit counter consisting of PCH and PCL,

Rev.2.00 Nov 14, 2006 page 112 of 185REJ09B0322-0200APPENDIX 1. Instruction Cycles in each Addressing ModeClock φ controls the system timing of 7

IMPLIEDRev.2.00 Nov 14, 2006 page 113 of 185REJ09B0322-0200Instructions :Byte length :Cycle number :Timing :∆CLC∆CLD∆CLI∆CLT∆CLV∆DEX∆DEY∆INX∆INY∆

IMPLIEDRev.2.00 Nov 14, 2006 page 114 of 185REJ09B0322-0200Instruction :Byte length :Cycle number :Timing :∆BRK17PCHPCHPCLPCL+1PC PC+1 S,00(Note

IMPLIEDRev.2.00 Nov 14, 2006 page 115 of 185REJ09B0322-0200∆STP∆WITInstructions :Byte length :Timing :1PCLPCL+1PCL+1PCHPC PC+1PCH SYNCR/WRD ADDRD

IMPLIEDRev.2.00 Nov 14, 2006 page 116 of 185REJ09B0322-0200∆RTIInstruction :Byte length :Cycle number :Timing :16PC PC+1P CHP CHPCLPCL+1S,00(Note

IMPLIEDRev.2.00 Nov 14, 2006 page 117 of 185REJ09B0322-0200Instruction :Byte length :Cycle number :Timing :∆RTS16PCLP CL+ 1SS+1S+2PCLPCHPCHPCH00

IMPLIEDRev.2.00 Nov 14, 2006 page 118 of 185REJ09B0322-0200∆PHA∆PHPInstructions :Byte length :Cycle number :Timing :13PCPC+1PCHPCHPCLPCL+1SAor PS

IMPLIEDRev.2.00 Nov 14, 2006 page 119 of 185REJ09B0322-0200Instructions :Byte length :Cycle number :Timing :∆PLA∆PLP14P CLP CL+ 1PCHPCH0 0 ( N

Rev.2.00 Nov 14, 2006 page 120 of 185REJ09B0322-0200[T=0]IMMEDIATEInstructions :Byte length :Cycle number :Timing :∆ADC∆#$nn (T=0)∆AND∆#$nn

Rev.2.00 Nov 14, 2006 page 121 of 185REJ09B0322-0200ACCUMULATORInstructions :Byte length :Cycle number :Timing :∆ASL ∆A∆DEC ∆A∆INC ∆A∆LSR ∆A∆ROL

Rev.2.00 Nov 14, 2006 page 5 of 185REJ09B0322-0200[ X modified operation mode flag T ] ----------------------- Bit 5This flag determines whether

Rev.2.00 Nov 14, 2006 page 122 of 185REJ09B0322-0200ACCUMULATOR BIT RELATIVEInstructions :Byte length :(1) With no branchCycle number :Timing :

Rev.2.00 Nov 14, 2006 page 123 of 185REJ09B0322-0200ACCUMULATOR BIT RELATIVEInstructions :Byte length :(2) With branchCycle number :Timing :26

Rev.2.00 Nov 14, 2006 page 124 of 185REJ09B0322-0200ACCUMULATOR BITInstructions :Byte length :Cycle number :Timing :∆CLB∆i,A∆SEB∆i,A12PCPC+1PCHPC

Rev.2.00 Nov 14, 2006 page 125 of 185REJ09B0322-0200BIT RELATIVEInstructions :Byte length :(1) With no branchCycle number :Timing :∆BBC∆i,$zz,

Rev.2.00 Nov 14, 2006 page 126 of 185REJ09B0322-0200BIT RELATIVEInstructions :Byte length :(2) With branchCycle number :Timing :∆BBC∆i,$zz,$hhl

Rev.2.00 Nov 14, 2006 page 127 of 185REJ09B0322-0200ZERO PAGE BITInstructions :Byte length :Cycle number :Timing :∆CLB∆i,$zz∆SEB∆i,$zz25PCPCLPCL+

Rev.2.00 Nov 14, 2006 page 128 of 185REJ09B0322-0200ZERO PAGE[T=0]Instructions :Byte length :Cycle number :Timing :∆ADC ∆$zz (T=0)∆AND ∆$zz

Rev.2.00 Nov 14, 2006 page 129 of 185REJ09B0322-0200ZERO PAGEInstructions :Byte length :Cycle number :Timing :25∆ASL ∆$zz∆COM ∆$zz∆DEC ∆$zz∆INC ∆

Rev.2.00 Nov 14, 2006 page 130 of 185REJ09B0322-0200ZERO PAGEInstruction :Byte length :Cycle number :Timing :∆RRF∆$zz28PCPC+1PCHPCHPCLPCL+100ADLA

Rev.2.00 Nov 14, 2006 page 131 of 185REJ09B0322-0200ZERO PAGEInstruction :Byte length :Cycle number :Timing :∆LDM∆#$nn,$zz34PCPC+1PCHPCHPCLPCL+10

Rev.2.00 Nov 14, 2006 page 6 of 185REJ09B0322-0200Fig.3.1.1 Byte Structure of InstructionsINSTRUCTIONSAddressing mode3. INSTRUCTIONS3.1 Addressin

Rev.2.00 Nov 14, 2006 page 132 of 185REJ09B0322-0200ZERO PAGEInstructions :Byte length :Cycle number :Timing :24∆STA∆$zz∆STX∆$zz∆STY∆$zzPCPC+1PCH

Rev.2.00 Nov 14, 2006 page 133 of 185REJ09B0322-0200Zero Page X∆MUL∆$zz,X (Note)Instruction :Byte length :Cycle number :Timing :215P CP C + 1A DL

Rev.2.00 Nov 14, 2006 page 134 of 185REJ09B0322-0200Zero Page XInstruction :Byte length :Cycle number :Timing :∆DIV∆$zz,X (Note)216P CP C + 1A

Rev.2.00 Nov 14, 2006 page 135 of 185REJ09B0322-0200Zero Page XInstructions :Byte length :Cycle number :Timing :∆ASL ∆$zz,X∆DEC ∆$zz,X∆INC ∆$zz,X

Rev.2.00 Nov 14, 2006 page 136 of 185REJ09B0322-0200ZERO PAGE X, ZERO PAGE Y[T=0]∆ADC∆$zz,X (T=0)∆AND∆$zz,X (T=0)∆CMP∆$zz,X (T=0)∆

Rev.2.00 Nov 14, 2006 page 137 of 185REJ09B0322-0200ZERO PAGE X, ZERO PAGE YInstructions :Byte length :Cycle number :Timing :∆STA∆$zz,X∆STX∆$zz,Y

Rev.2.00 Nov 14, 2006 page 138 of 185REJ09B0322-0200ABSOLUTE[T=0]Instructions :Byte length :Cycle number :Timing :∆ADC ∆$hhll (T=0)∆AND ∆$hhl

Rev.2.00 Nov 14, 2006 page 139 of 185REJ09B0322-0200ABSOLUTE∆ASL ∆$hhll∆DEC ∆$hhll∆INC ∆$hhll∆LSR ∆$hhll∆ROL ∆$hhll∆ROR∆$hhllInstructions :Byte l

Rev.2.00 Nov 14, 2006 page 140 of 185REJ09B0322-0200ABSOLUTEInstruction :Byte length :Cycle number :Timing :∆JMP∆$hhll33PCHPCL+1PC PC+1PCHPCLPC+2

Rev.2.00 Nov 14, 2006 page 141 of 185REJ09B0322-0200ABSOLUTEInstruction :Byte length :Cycle number :Timing :∆JSR∆$hhll36PC PC+1PCH PCHPCLPCL+1 S

Rev.2.00 Nov 14, 2006 page 7 of 185REJ09B0322-0200INSTRUCTIONSImmediateAddressing mode :Function :Instructions :Example :ImmediateSpecifies the O

Rev.2.00 Nov 14, 2006 page 142 of 185REJ09B0322-0200ABSOLUTEInstructions :Byte length :Cycle number :Timing :∆STA∆$hhll∆STX∆$hhll∆STY∆$hhll35PCPC

Rev.2.00 Nov 14, 2006 page 143 of 185REJ09B0322-0200ABSOLUTE X, ABSOLUTE Y[T=0]∆ADC ∆$hhll,X or Y (T=0)∆AND ∆$hhll,X or Y (T=0)∆CMP ∆$h

Rev.2.00 Nov 14, 2006 page 144 of 185REJ09B0322-0200ABSOLUTE XInstructions :Byte length :Cycle number :Timing :∆ASL ∆$hhll,X∆DEC ∆$hhll,X∆INC ∆$h

Rev.2.00 Nov 14, 2006 page 145 of 185REJ09B0322-0200ABSOLUTE X, ABSOLUTE YInstruction :Byte length :Cycle number :Timing :36∆STA∆$hhll,X or YPCPC

Rev.2.00 Nov 14, 2006 page 146 of 185REJ09B0322-0200INDIRECTInstruction :Byte length :Cycle number :Timing :35∆JMP∆($hhll)PCPC+1PCHPCHP CLP CL+ 1

Rev.2.00 Nov 14, 2006 page 147 of 185REJ09B0322-0200ZERO PAGE INDIRECTInstruction :Byte length :Cycle number :Timing :24∆JMP∆($zz)P CPC+1P CHPCLP

Rev.2.00 Nov 14, 2006 page 148 of 185REJ09B0322-0200ZERO PAGE INDIRECTInstruction :Byte length :Cycle number :Timing :∆JSR∆($zz)27PC P C + 1PCHPC

Rev.2.00 Nov 14, 2006 page 149 of 185REJ09B0322-0200INDIRECT X[T=0]26Instructions :Byte length :Cycle number :Timing :∆ADC ∆($zz,X) (T=0)∆AN

Rev.2.00 Nov 14, 2006 page 150 of 185REJ09B0322-0200INDIRECT XInstruction :Byte length :Cycle number :Timing :27∆STA∆($zz,X)PC+1P CHPCLP CL+ 1B A

Rev.2.00 Nov 14, 2006 page 151 of 185REJ09B0322-0200INDIRECT Y[T=0]∆ADC∆($zz),Y (T=0)∆AND∆($zz),Y (T=0)∆CMP∆($zz),Y (T=0)∆EOR∆($zz

Rev.2.00 Nov 14, 2006 page 8 of 185REJ09B0322-0200INSTRUCTIONSAccumulatorAddressing mode :Function :Instructions :Example :AccumulatorSpecifies t

Rev.2.00 Nov 14, 2006 page 152 of 185REJ09B0322-0200INDIRECT YInstruction :Byte length :Cycle number :Timing :27∆STA∆($zz),YPC PC+1PCHPCLPCL+1PCH

Rev.2.00 Nov 14, 2006 page 153 of 185REJ09B0322-0200RELATIVE∆BCC ∆$hhll∆BCS ∆$hhll∆BEQ ∆$hhll∆BMI ∆$hhll∆BNE ∆$hhll∆BPL ∆$hhll∆BVC ∆$hhll∆BVS ∆$h

Rev.2.00 Nov 14, 2006 page 154 of 185REJ09B0322-0200RELATIVE∆BCC ∆$hhll∆BCS ∆$hhll∆BEQ ∆$hhll∆BMI ∆$hhll∆BNE ∆$hhll∆BPL ∆$hhll∆BVC ∆$hhll∆BVS ∆$h

Rev.2.00 Nov 14, 2006 page 155 of 185REJ09B0322-0200RELATIVEInstruction :Byte length :Cycle number :Timing :24∆BRA∆$hhll φφφφP CPCLPCHPCL+1(

Rev.2.00 Nov 14, 2006 page 156 of 185REJ09B0322-0200SPECIAL PAGEInstruction :Byte length :Cycle number :Timing :∆JSR∆\$hhll25PC PC+1PCHPCLPCL+1

Rev.2.00 Nov 14, 2006 page 157 of 185REJ09B0322-0200IMMEDIATE[T=1]Instructions :Byte length :Cycle number :Timing :25∆ADC∆#$nn (T=1)∆AND∆#$n

Rev.2.00 Nov 14, 2006 page 158 of 185REJ09B0322-0200IMMEDIATE[T=1]∆CMP∆#$nn (T=1)Instruction :Byte length :Cycle number :Timing :23PCPC+1PCH

Rev.2.00 Nov 14, 2006 page 159 of 185REJ09B0322-0200IMMEDIATE[T=1]Instruction :Byte length :Cycle number :Timing :∆LDA∆#$nn (T=1)24PCPC+1PCH

Rev.2.00 Nov 14, 2006 page 160 of 185REJ09B0322-0200ZERO PAGE[T=1]Instructions :Byte length :Cycle number :Timing :26∆ADC∆$zz (T=1)∆AND∆$zz

Rev.2.00 Nov 14, 2006 page 161 of 185REJ09B0322-0200∆CMP∆$zz (T=1)ZERO PAGE[T=1]Instruction :Byte length :Cycle number :Timing :24PCPC+1PCHP

Rev.2.00 Nov 14, 2006 page 9 of 185REJ09B0322-0200Zero PageINSTRUCTIONSAddressing mode :Function :Instructions :Example :Zero PageSpecifies the c

Rev.2.00 Nov 14, 2006 page 162 of 185REJ09B0322-0200ZERO PAGE[T=1]Instruction :Byte length :Cycle number :Timing :25∆LDA∆$zz (T=1)PCPC+1PCHP

Rev.2.00 Nov 14, 2006 page 163 of 185REJ09B0322-0200ZERO PAGE X[T=1]Instructions :Byte length :Cycle number :Timing :∆ADC∆$zz,X (T=1)∆AND∆$z

Rev.2.00 Nov 14, 2006 page 164 of 185REJ09B0322-0200ZERO PAGE X[T=1]Instruction :Byte length :Cycle number :Timing :∆CMP∆$zz,X (T=1)25PC+1PC

Rev.2.00 Nov 14, 2006 page 165 of 185REJ09B0322-0200∆LDA∆$zz,X (T=1)ZERO PAGE X[T=1]Instruction :Byte length :Cycle number :Timing :26PC+1PC

Rev.2.00 Nov 14, 2006 page 166 of 185REJ09B0322-0200ABSOLUTE[T=1]Instructions :Byte length :Cycle number :Timing :∆ADC∆$hhll (T=1)∆AND∆$hhll

Rev.2.00 Nov 14, 2006 page 167 of 185REJ09B0322-0200ABSOLUTE[T=1]Instruction :Byte length :Cycle number :Timing :∆CMP∆$hhll (T=1)35P CHPCL+1P

Rev.2.00 Nov 14, 2006 page 168 of 185REJ09B0322-0200ABSOLUTE[T=1]Instruction :Byte length :Cycle number :Timing :∆LDA∆$hhll (T=1)36P CHP CL+

Rev.2.00 Nov 14, 2006 page 169 of 185REJ09B0322-0200∆ADC∆$hhll,X or Y (T=1)∆AND∆$hhll,X or Y (T=1)∆EOR∆$hhll,X or Y (T=1)∆ORA∆$hhl

Rev.2.00 Nov 14, 2006 page 170 of 185REJ09B0322-0200ABSOLUTE X, ABSOLUTE Y[T=1]Instruction :Byte length :Cycle number :Timing :∆CMP∆$hhll,X or Y

Rev.2.00 Nov 14, 2006 page 171 of 185REJ09B0322-0200ABSOLUTE X, ABSOLUTE Y[T=1]Instruction :Byte length :Cycle number :Timing :∆LDA∆$hhll,X or Y

Rev.2.00 Nov 14, 2006 page 10 of 185REJ09B0322-0200INSTRUCTIONSZero Page XAddressing mode :Function :Instructions :Example :Zero Page XSpecified

Rev.2.00 Nov 14, 2006 page 172 of 185REJ09B0322-0200INDIRECT X[T=1]Instructions :Byte length :Cycle number :Timing :∆ADC∆($zz,X) (T=1)∆AND∆(

Rev.2.00 Nov 14, 2006 page 173 of 185REJ09B0322-0200INDIRECT X[T=1]Instruction :Byte length :Cycle number :Timing :27∆CMP∆($zz,X) (T=1)PCHP

Rev.2.00 Nov 14, 2006 page 174 of 185REJ09B0322-0200∆LDA∆($zz,X) (T=1)INDIRECT X[T=1]Instruction :Byte length :Cycle number :Timing :28PCHPC

Rev.2.00 Nov 14, 2006 page 175 of 185REJ09B0322-0200INDIRECT Y[T=1]Instructions :Byte length :Cycle number :Timing :∆ADC∆($zz),Y (T=1)∆AND∆(

Rev.2.00 Nov 14, 2006 page 176 of 185REJ09B0322-0200INDIRECT Y[T=1]Instruction :Byte length :Cycle number :Timing :∆CMP∆($zz),Y (T=1)27PCHPC

Rev.2.00 Nov 14, 2006 page 177 of 185REJ09B0322-0200INDIRECT Y[T=1]∆LDA∆($zz),Y (T=1)Instruction :Byte length :Cycle number :Timing :28P CHP

Rev.2.00 Nov 14, 2006 page 178 of 185REJ09B0322-0200APPENDIX 2740 Family Machine Language Instruction TableAPPENDIX 2. 740 Family Machine Languag

Rev.2.00 Nov 14, 2006 page 179 of 185REJ09B0322-0200222333222223332212233122331111226965756D7D796171E9E5F5EDFDF9E1F13AE6F6EEFE1AC6D6CEDEE8CAC8886

Rev.2.00 Nov 14, 2006 page 180 of 185REJ09B0322-0200AND # $ nnAND $ zzAND $ zz, XAND $ hhIIAND $ hhII, XAND $ hhII, YAND ($ zz, X)AND ($ zz), YOR

Rev.2.00 Nov 14, 2006 page 181 of 185REJ09B0322-0200256672566725667256678252512233122331223312233212120A06160E1E4A46564E5E2A26362E3E6A66766E7E82(

Rev.2.00 Nov 14, 2006 page 11 of 185REJ09B0322-0200Zero Page YAddressing mode :Function :Instructions :Example :INSTRUCTIONSZero Page YSpecifies

Rev.2.00 Nov 14, 2006 page 182 of 185REJ09B0322-020043546754545222222226672222332322232322222222111111804C6CB2200222(1+2i)x10+3(1+2i)x10+72ix10+3

Rev.2.00 Nov 14, 2006 page 183 of 185REJ09B0322-0200SymbolAAiXYMMiPSSPCPCLPCHNVTBDIZC#$MeansAccumulatorBit i of accumulatorIndex register XIndex

Rev.2.00 Nov 14, 2006 page 184 of 185REJ09B0322-0200D7 – D4D3 – D0Hexadecimalnotation000000010010001101000101011001111000100110101011110011011110

Rev.2.00 Nov 14, 2006 page 185 of 185REJ09B0322-0200MEMORANDUM740 Family Iist of Instruction Codes

740 Family Software ManualPublication Data : Rev.1.00 Aug 29, 1997Rev.2.00 Nov 14, 2006Published by : Sales Strategic Planning Div.Renesas Technology

1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 Japan740 FamilyREJ09B0322-0200Software Manual

Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to chang

Rev.2.00 Nov 14, 2006 page 12 of 185REJ09B0322-0200INSTRUCTIONSAbsoluteAddressing mode :Function :Instructions :Example :AbsoluteSpecifies the co

Rev.2.00 Nov 14, 2006 page 13 of 185REJ09B0322-0200INSTRUCTIONSAbsolute XAddressing mode :Function :Instructions :Example :Absolute XSpecifies th

Rev.2.00 Nov 14, 2006 page 14 of 185REJ09B0322-0200INSTRUCTIONSAbsolute YAddressing mode :Function :Instructions :Example :Absolute YSpecifies th

Rev.2.00 Nov 14, 2006 page 15 of 185REJ09B0322-0200ImpliedAddressing mode :Function :Instructions :Example :ImpliedOperates on a given register o

Rev.2.00 Nov 14, 2006 page 16 of 185REJ09B0322-0200INSTRUCTIONSRelativeAddressing mode :Function :Instructions :Example :Addressing modeRelativeS

Rev.2.00 Nov 14, 2006 page 17 of 185REJ09B0322-0200INSTRUCTIONSIndirect XAddressing mode :Function :Instructions :Example :Indirect XSpecifies th

Rev.2.00 Nov 14, 2006 page 18 of 185REJ09B0322-0200INSTRUCTIONSIndirect YAddressing mode :Function :Instructions :Example :Indirect YSpecifies th

Rev.2.00 Nov 14, 2006 page 19 of 185REJ09B0322-0200INSTRUCTIONSIndirect AbsoluteAddressing mode :Function :Instructions :Example :Indirect Absolu

Rev.2.00 Nov 14, 2006 page 20 of 185REJ09B0322-0200INSTRUCTIONSAddressing mode :Function :Instructions :Example :Zero Page Indirect AbsoluteSpeci

Rev.2.00 Nov 14, 2006 page 21 of 185REJ09B0322-0200INSTRUCTIONS Special PageAddressing mode :Function :Instructions :Example :Addressing modeSpec

740 FamilySoftware Manual8User’s ManualRev.2.00 2006.11RENESAS MCUAll information contained in these materials, including products and product speci

Rev.2.00 Nov 14, 2006 page 22 of 185REJ09B0322-0200INSTRUCTIONSZero Page BitAddressing mode :Function :Instructions :Example :Zero Page BitSpecif

Rev.2.00 Nov 14, 2006 page 23 of 185REJ09B0322-0200INSTRUCTIONSAccumulator BitAddressing mode :Function :Instruction:Example :Accumulator BitSpec

Rev.2.00 Nov 14, 2006 page 24 of 185REJ09B0322-0200INSTRUCTIONSAddressing mode :Function :Instructions :Example :Addressing modeAccumulator Bit R

Rev.2.00 Nov 14, 2006 page 25 of 185REJ09B0322-0200INSTRUCTIONSZero Page Bit RelativeSpecifies the address of a memory location where thenext Op-

Rev.2.00 Nov 14, 2006 page 26 of 185REJ09B0322-02003.2 Instruction SetThe 740 Family has 71 types of instructions. The detailed explanation of th

Rev.2.00 Nov 14, 2006 page 27 of 185REJ09B0322-02003.2.2 Operating instructionThe operating instructions include the operations of addition and s

Rev.2.00 Nov 14, 2006 page 28 of 185REJ09B0322-0200INSTRUCTIONSInstruction SetContentsClear C flagSet C flagClear D flagSet D flagClear I flagSet

Rev.2.00 Nov 14, 2006 page 29 of 185REJ09B0322-0200InstructionsWITSTPInstructionBRKContentsExecutes a software interrupt.INSTRUCTIONSInterruptIns

Rev.2.00 Nov 14, 2006 page 30 of 185REJ09B0322-0200INSTRUCTIONS3.3 Description of instructionsThis section presents in detail the 740 Family inst

Rev.2.00 Nov 14, 2006 page 31 of 185REJ09B0322-0200ADC ADCADD WITH CARRYWhen (T) = 0, (A) ← (A) + (M) + (C)(T) = 1, (M(X)) ← (M(X)) + (M) + (C)Wh

1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use.

Rev.2.00 Nov 14, 2006 page 32 of 185REJ09B0322-0200AND ANDLOGICAL ANDWhen (T) = 0, (A) ← (A) ∧ (M)(T) = 1, (M(X)) ← (M(X)) ∧ (M)When T = 0, thi

Rev.2.00 Nov 14, 2006 page 33 of 185REJ09B0322-0200ASL ASLARITHMETIC SHIFT LEFTOperation :Function :Status flag:C ← b7

Rev.2.00 Nov 14, 2006 page 34 of 185REJ09B0322-0200BBC BBCBRANCH ON BIT CLEARWhen (Mi) or (Ai) = 0, (PC) ← (PC) + n + REL(Mi) or (Ai) = 1, (PC)

Rev.2.00 Nov 14, 2006 page 35 of 185REJ09B0322-0200BBS BBSBRANCH ON BIT SETWhen (Mi) or (Ai) = 1, (PC) ← (PC) + n + REL(Mi) or (Ai) = 0, (PC) ←

Rev.2.00 Nov 14, 2006 page 36 of 185REJ09B0322-0200BCC BCCBRANCH ON CARRY CLEARWhen (C) = 0, (PC) ← (PC) + 2 + REL(C) = 1, (PC) ← (PC) + 2This i

Rev.2.00 Nov 14, 2006 page 37 of 185REJ09B0322-0200BCS BCSBRANCH ON CARRY SETWhen (C) = 1, (PC) ← (PC) + 2 + REL(C) = 0, (PC) ← (PC) + 2This ins

Rev.2.00 Nov 14, 2006 page 38 of 185REJ09B0322-0200BEQ BEQBRANCH ON EQUALWhen (Z) = 1, (PC) ← (PC) + 2 + REL(Z) = 0, (PC) ← (PC) + 2This instruct

Rev.2.00 Nov 14, 2006 page 39 of 185REJ09B0322-0200BIT BITTEST BIT IN MEMORY WITH ACCUMULATOR(A) ∧ (M)This instruction takes a bit-wise logical

Rev.2.00 Nov 14, 2006 page 40 of 185REJ09B0322-0200BMI BMIBRANCH ON RESULT MINUSWhen (N) = 1, (PC) ← (PC) + 2 + REL(N) = 0, (PC) ← (PC) + 2This i

Rev.2.00 Nov 14, 2006 page 41 of 185REJ09B0322-0200BNE BNE BRANCH ON NOT EQUALWhen (Z) = 0, (PC) ← (PC) + 2 + REL(Z) = 1, (PC) ← (PC) + 2This ins

A - 1REVISION HISTORYRev. Date DescriptionPage Summary740 Family Software Manual1.00 Aug 29, 1997 – First edition issued2.00Nov 14, 2006 – Changed to

Rev.2.00 Nov 14, 2006 page 42 of 185REJ09B0322-0200BPLBPLBRANCH ON RESULT PLUSWhen (N) = 0, (PC) ← (PC) + 2 + REL(N) = 1, (PC) ← (PC) + 2This ins

Rev.2.00 Nov 14, 2006 page 43 of 185REJ09B0322-0200BRA BRABRANCH ALWAYS(PC) ← (PC) + 2 + RELThis instruction branches to the appointed address.

Rev.2.00 Nov 14, 2006 page 44 of 185REJ09B0322-0200BRKBRKFORCE BREAK(B) ← 1(PC) ← (PC) + 2(M(S)) ← (PCH)(S) ← (S) – 1(M(S)) ← (PCL)(S) ← (S) –

Rev.2.00 Nov 14, 2006 page 45 of 185REJ09B0322-0200BVC BVCBRANCH ON OVERFLOW CLEARWhen (V) = 0, (PC) ← (PC) + 2 + REL(V) = 1, (PC) ← (PC) + 2Thi

Rev.2.00 Nov 14, 2006 page 46 of 185REJ09B0322-0200BVSBVSBRANCH ON OVERFLOW SETWhen (V) = 1, (PC) ← (PC) + 2 + REL(V) = 0, (PC) ← (PC) + 2This i

Rev.2.00 Nov 14, 2006 page 47 of 185REJ09B0322-0200CLB CLBCLEAR BIT(Ai) ← 0, or(Mi) ← 0This instruction clears the designated bit i of A or M.

Rev.2.00 Nov 14, 2006 page 48 of 185REJ09B0322-0200CLCCLCCLEAR CARRY FLAG(C) ← 0This instruction clears C.No changeNo changeNo changeNo changeNo

Rev.2.00 Nov 14, 2006 page 49 of 185REJ09B0322-0200CLD CLDCLEAR DECIMAL MODE(D) ← 0This instruction clears D.No changeNo changeNo changeNo chang

Rev.2.00 Nov 14, 2006 page 50 of 185REJ09B0322-0200CLICLICLEAR INTERRUPT DISABLE STATUSAddressing modeImpliedStatement∆CLIMachine codes5816Byte

Rev.2.00 Nov 14, 2006 page 51 of 185REJ09B0322-0200CLT CLTCLEAR TRANSFER FLAG(T) ← 0This instruction clears T.No changeNo change0No changeNo cha

Hardware overview and electrical characteristicsHardware specifications (pin assignments, memory maps, peripheralspecifications, electrical characteri

Rev.2.00 Nov 14, 2006 page 52 of 185REJ09B0322-0200CLVCLVCLEAR OVERFLOW FLAG(V) ← 0This instruction clears V.No change0No changeNo changeNo chang

Rev.2.00 Nov 14, 2006 page 53 of 185REJ09B0322-0200CMP CMPCOMPAREWhen (T) = 0, (A) – (M)(T) = 1, (M(X)) – (M)When T = 0, this instruction subtrac

Rev.2.00 Nov 14, 2006 page 54 of 185REJ09B0322-0200COMCOMCOMPLEMENT(M) ← (M)This instruction takes the one’s complement of the contents ofM and s

Rev.2.00 Nov 14, 2006 page 55 of 185REJ09B0322-0200CPX CPXCOMPARE MEMORY AND INDEX REGISTER X(X) – (M)This instruction subtracts the contents of

Rev.2.00 Nov 14, 2006 page 56 of 185REJ09B0322-0200CPYCPYCOMPARE MEMORY AND INDEX REGISTER Y(Y) – (M)This instruction subtracts the contents of

Rev.2.00 Nov 14, 2006 page 57 of 185REJ09B0322-0200DEC DECDECREMENT BY ONE(A) ← (A) – 1, or(M) ← (M) – 1This instruction subtracts 1 from the co

Rev.2.00 Nov 14, 2006 page 58 of 185REJ09B0322-0200DEXDEXDECREMENT INDEX REGISTER X BY ONE(X) ← (X) – 1This instruction subtracts one from the cu

Rev.2.00 Nov 14, 2006 page 59 of 185REJ09B0322-0200DEYDEYDECREMENT INDEX REGISTER Y BY ONE(Y) ← (Y) – 1This instruction subtracts one from the c

Rev.2.00 Nov 14, 2006 page 60 of 185REJ09B0322-0200(A) ← (M(zz+(X)+1),M(zz+(X)) / (A)M(S) ← one’s complement of Remainder(S) ← (S) – 1Divides t

Rev.2.00 Nov 14, 2006 page 61 of 185REJ09B0322-0200EOREOREXCLUSIVE OR MEMORY WITH ACCUMULATOROperation :Function :Status flag:When (T) = 0, (A)

A-1Table of contentsCHAPTER 1. OVERVIEW... 1CHAPTER 2. CENTRA

Rev.2.00 Nov 14, 2006 page 62 of 185REJ09B0322-0200INCINCINCREMENT BY ONEOperation :Function :Status flag:N :V :T :B :I :D :Z :C :Addressing mode

Rev.2.00 Nov 14, 2006 page 63 of 185REJ09B0322-0200INXINXINCREMENT INDEX REGISTER X BY ONEOperation :Function :Status flag:(X) ← (X) + 1This ins

Rev.2.00 Nov 14, 2006 page 64 of 185REJ09B0322-0200INYINYINCREMENT INDEX REGISTER Y BY ONE(Y) ← (Y) + 1This instruction adds one to the contents

Rev.2.00 Nov 14, 2006 page 65 of 185REJ09B0322-0200JMPJMPJUMPOperation :Function :Status flag:When addressing mode is(a) Absolute, then(PC) ←

Rev.2.00 Nov 14, 2006 page 66 of 185REJ09B0322-0200JSRJSRJUMP TO SUBROUTINE(M(S)) ← (PCH)(S) ← (S) – 1(M(S)) ← (PCL)(S) ← (S) – 1After the ab

Rev.2.00 Nov 14, 2006 page 67 of 185REJ09B0322-0200LDALDALOAD ACCUMULATOR WITH MEMORYOperation :Function :Status flag:When (T) = 0, (A) ← (M)

Rev.2.00 Nov 14, 2006 page 68 of 185REJ09B0322-0200LDMLDMLOAD IMMEDIATE DATA TO MEMORY(M) ← nnThis instruction loads the immediate value in M.No

Rev.2.00 Nov 14, 2006 page 69 of 185REJ09B0322-0200LDXLDXLOAD INDEX REGISTER X FROM MEMORY(X) ← (M)This instruction loads the contents of M in

Rev.2.00 Nov 14, 2006 page 70 of 185REJ09B0322-0200LDYLDYLOAD INDEX REGISTER Y FROM MEMORY(Y) ← (M)This instruction loads the contents of M in

Rev.2.00 Nov 14, 2006 page 71 of 185REJ09B0322-0200LSRLSRLOGICAL SHIFT RIGHTThis instruction shifts either A or M one bit to the right suchthat

A-2Table of contentsAPPENDIX 1. Instruction Cycles in each Addressing Mode ... 112APPENDIX 2. 740 Family Machine Language Instruc

Rev.2.00 Nov 14, 2006 page 72 of 185REJ09B0322-0200M(S) • (A) ← (A) ✕ M(zz+(X))(S) ← (S) – 1Multiplies Accumulator with the memory specified by

Rev.2.00 Nov 14, 2006 page 73 of 185REJ09B0322-0200NOPNOPNO OPERATIONAddressing modeImpliedStatement∆NOP(PC) ← (PC) + 1This instruction adds on

Rev.2.00 Nov 14, 2006 page 74 of 185REJ09B0322-0200ORAORAOR MEMORY WITH ACCUMULATOROperation :Function :Status flag:When (T) = 0, (A) ← (A) ∨

Rev.2.00 Nov 14, 2006 page 75 of 185REJ09B0322-0200PHAPHAPUSH ACCUMULATOR ON STACKOperation :Function :Status flag :(M(S)) ← (A)(S) ← (S) –

Rev.2.00 Nov 14, 2006 page 76 of 185REJ09B0322-0200PHPPHPPUSH PROCESSOR STATUS ON STACK(M(S)) ← (PS)(S) ← (S) – 1This instruction pushes the co

Rev.2.00 Nov 14, 2006 page 77 of 185REJ09B0322-0200PLAPLAPULL ACCUMULATOR FROM STACKOperation :Function :Status flag:(S) ← (S) + 1(A) ← (M(S)

Rev.2.00 Nov 14, 2006 page 78 of 185REJ09B0322-0200PLPPLPPULL PROCESSOR STATUS FROM STACK(S) ← (S) + 1(PS) ← (M(S))This instruction increments

Rev.2.00 Nov 14, 2006 page 79 of 185REJ09B0322-0200ROLROLROTATE ONE BIT LEFTOperation :Function :Status flag:This instruction shifts either A

Rev.2.00 Nov 14, 2006 page 80 of 185REJ09B0322-0200RORRORROTATE ONE BIT RIGHTThis instruction shifts either A or M one bit right through C. Cis

Rev.2.00 Nov 14, 2006 page 81 of 185REJ09B0322-0200RRFRRFROTATE RIGHT OF FOUR BITSOperation :Function :Status flag : b7 b4 b3

Rev.2.00 Nov 14, 2006 page 1 of 185REJ09B0322-0200OVERVIEW1. OVERVIEWThe distinctive features of the CMOS 8-bit microcomputers 740 Family’s softw

Rev.2.00 Nov 14, 2006 page 82 of 185REJ09B0322-0200RTIRTIRETURN FROM INTERRUPT(S) ← (S) + 1(PS) ← (M(S))(S) ← (S) + 1(PCL) ← (M(S))(S) ← (S)

Rev.2.00 Nov 14, 2006 page 83 of 185REJ09B0322-0200RTSRTSRETURN FROM SUBROUTINEOperation :Function :Status flag:(S) ← (S) + 1(PCL) ← (M(S))(S)

Rev.2.00 Nov 14, 2006 page 84 of 185REJ09B0322-0200SBCSBCSUBTRACT WITH CARRYWhen (T) = 0, (A) ← (A) – (M) – (C)(T) = 1, (M(X)) ← (M(X)) – (M) – (

Rev.2.00 Nov 14, 2006 page 85 of 185REJ09B0322-0200SEBSEBSET BIT(Ai) ← 1, or(Mi) ← 1This instruction sets the designated bit i of A or M.No chan

Rev.2.00 Nov 14, 2006 page 86 of 185REJ09B0322-0200SECSECSET CARRY FLAG(C) ← 1This instruction sets C.No changeNo changeNo changeNo changeNo cha

Rev.2.00 Nov 14, 2006 page 87 of 185REJ09B0322-0200SEDSEDSET DECIMAL MODE(D) ← 1This instruction set D.No changeNo changeNo changeNo changeNo ch

Rev.2.00 Nov 14, 2006 page 88 of 185REJ09B0322-0200(I) ← 1This instruction sets I.No changeNo changeNo changeNo change1No changeNo changeNo chan

Rev.2.00 Nov 14, 2006 page 89 of 185REJ09B0322-0200SETSETSET TRANSFER FLAG(T) ← 1This instruction sets T.No changeNo change1No changeNo changeNo

Rev.2.00 Nov 14, 2006 page 90 of 185REJ09B0322-0200STASTASTORE ACCUMULATOR IN MEMORY(M) ← (A)This instruction stores the contents of A in M.The

Rev.2.00 Nov 14, 2006 page 91 of 185REJ09B0322-0200STPSTPSTOPCPU ← Stand-by state (Oscillation stopped)This instruction resets the oscillation c