Renesas HD74LV2GT14A User Manual

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Rev.2.00, Oct.16.2003, page 1 of 9
HD74LV2GT14A
Triple Inverters with Schmitt-trigger Inputs /
CMOS Logic Level Shifter
REJ03D0141–0200Z
(Previous ADE-205-666A (Z))
Rev.2.00
Oct.16.2003
Description
The HD74LV2GT14A has triple inverters with Schmitt-trigger inputs in an 8 pin package. The input
protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used
as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to
3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed
operation is suitable for the battery powered products (e.g., notebook computers), and the low power
consumption extends the battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
Logic-level translate function
3.0 V CMOS logic 5.0 V CMOS logic (@V
CC
= 5.0 V)
1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@V
CC
= 3.3 V)
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Output current ±6 mA (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
CC
= 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name Package Type Package Code Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV2GT14AUSE SSOP-8 pin TTP-8DBV US E (3,000 pcs/reel)
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Summary of Contents

Page 1 - HD74LV2GT14A

Rev.2.00, Oct.16.2003, page 1 of 9HD74LV2GT14ATriple Inverters with Schmitt-trigger Inputs /CMOS Logic Level ShifterREJ03D0141–0200Z(Previous ADE-20

Page 2 - T 1 4

© 2003. Renesas Technology Corp., All rights reserved. Printed in Japan.Colophon 1.0Keep safety first in your circuit designs!1. Renesas Technology Co

Page 3 - Absolute Maximum Ratings

HD74LV2GT14ARev.2.00, Oct.16.2003, page 2 of 9Outline and Article Indication• HD74LV2GT14ALot No.Y : Year code (the last digit of year)M : M

Page 4

HD74LV2GT14ARev.2.00, Oct.16.2003, page 3 of 9Pin Arrangement(Top view)8VCC171Y63A52Y1A23Y32A4GNDAbsolute Maximum RatingsItem Symbol Ratings Unit Te

Page 5 - Electrical Characteristic

HD74LV2GT14ARev.2.00, Oct.16.2003, page 4 of 9Recommended Operating ConditionsItem Symbol Min Max Unit ConditionsSupply voltage range VCC3.0 5.5 VIn

Page 6 - Operating Characteristics

HD74LV2GT14ARev.2.00, Oct.16.2003, page 5 of 9Electrical Characteristic• Ta = –40 to 85°CItem Symbol VCC (V) * Min Typ Max Unit Test condition3.0 —

Page 7 - Test Circuit

HD74LV2GT14ARev.2.00, Oct.16.2003, page 6 of 9Switching Characteristics• VCC = 3.3 ± 0.3 VTa = 25°C Ta = –40 to 85°CItem SymbolMin Typ Max Min MaxU

Page 8

HD74LV2GT14ARev.2.00, Oct.16.2003, page 7 of 9 Test CircuitPulse generator50ΩCLInputOutputVCCLNote: C includes probe and jig capacitance.

Page 9 - Package Dimensions

HD74LV2GT14ARev.2.00, Oct.16.2003, page 8 of 9InputOutput90%Vref10%50%tPHLtPLHVIGNDVOHVOLtrtf90%Vref10%50%• WaveformsNotes: 1. Input waveform : PR

Page 10 - ://www.renesas.co

HD74LV2GT14ARev.2.00, Oct.16.2003, page 9 of 9Package Dimensions(0.5)1.5 ± 0.2Package CodeJEDECJEITAMass (reference value)TTP–8DBV0.010 g8 − 0.2+

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