Renesas R8C/25 Manual download pdf (Page 6)

Rev. 1.1

R8C25 QuickDesign Guide.doc Page 6 of 10 12/23/2007

6. Clock Circuits

6.1. Reset Conditions

• On Power-Up and after a Reset the MCU will be running on the Slow Speed

On-Chip Oscillator with the CPU clock (Bclk) divided by 8. This results in a

core clock speed of approximately 125 kHz/8 or 15 kHz. It is, therefore,

important to shift to a higher speed clock early in the program if startup time

is important

• The High Speed On-Chip Oscillator trim register will be loaded with the

calibrated value to provide a 40 MHz clock as part of a Reset.

6.2. Clock Protection

• Changes to the clock mode registers are protected by the prc0 bit in the PRC

writing to these registers except when purposely modifying those registers

6.3. Low Power States (Wait and Stop Mode)

• Please see app notes

o Using Low Power Wait Mode for R8C/2X

o Using Stop Mode on R8C/2x

For more discussion on these special power modes

7. Protection Register

The protection register allows protecting some registers that can be important in

an application. These registers are:

Clock Mode Registers

Processor Mode Register

Flash Control Registers

Port 0 Direction Register

Voltage Detect Control Registers

All the registers can be left unprotected by modifying the associated protection

space after unprotecting this register (setting the protect bit to 1) automatically

protects this register (sets the bit back to 0). Due to this operation it is

recommended that interrupts be disabled and any DMA operations be prohibited

during these instructions. A typical sequence is shown below

asm (“fclr I”); //disable global interrupts

prc2 = 1; // allow writing PD0 direction register

pd0 = 0xff ; // set all of port 0 to outputs

prc2 = 0; // not actually required but good practice

asm (“fset I”) ; // enable global interrupts

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Renesas R8C/25 Manual Page 6