Renesas SH7058 Technical Information download pdf (Page 313)

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E.4 Sequential Trace Function

1. Six or more external bus cycles are required between each address condition that is specified

for each channel.

When a user program is executed with the address of a PC address condition specified, a

sequential break or a sequential trace stop may not operate correctly. Specify the address of the

instruction following the address condition as the PC for the start of the execution, then

execute the user program.

E.5 Differences between the Emulator and the MCU

Note that the emulator initializes some general or control registers whenever the system is

activated or the MCU is reset by commands.

Table E.3 Initial Values of Registers in the MCU and the Emulator

Emulator

(Power-On Reset)

PC Power-on reset vector

PC value

Power-on reset vector

PC value

Power-on reset vector

PC value

R0 to R14 H'00000000 Value before reset Undefined

R15 (SP) Power-on reset vector

SP value

Power-on reset vector

SP value

Power-on reset vector

SP value

SR H'000000F0 H'000000F0 H'00000XFX*

GBR H'00000000 Value before reset Undefined

VBR H'00000000 H'00000000 H'00000000

MACH H'00000000 Value before reset Undefined

MACL H'00000000 Value before reset Undefined

PR H'00000000 Value before reset Undefined

Note: X indicates an undefined value.

There is a delay on these signals since the user system interface circuit in the emulator

includes pull-up resistors and buffers. Due to the pull-up resistors, the signals can be at a high

level even when they are also in their high-impedance state. Take these points into account

when preparing hardware for the user system. For details on the user system interface and the

delays on signals, see appendix A, User System Interface Circuit.

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Renesas SH7058 Technical Information Page 313